lis2dh_interrupt_state lis2dh_get_int1_state() {
return (lis2dh_interrupt_state) watch_i2c_read8(LIS2DH_ADDRESS, LIS2DH_REG_INT1_SRC);
}
+
+void lis2dh_configure_aoi_int2(lis2dh_interrupt_configuration configuration, uint8_t threshold, uint8_t duration) {
+ watch_i2c_write8(LIS2DH_ADDRESS, LIS2DH_REG_CTRL6, LIS2DH_CTRL6_VAL_I2_INT2);
+ watch_i2c_write8(LIS2DH_ADDRESS, LIS2DH_REG_INT2_CFG, configuration);
+ watch_i2c_write8(LIS2DH_ADDRESS, LIS2DH_REG_INT2_THS, threshold);
+ watch_i2c_write8(LIS2DH_ADDRESS, LIS2DH_REG_INT2_DUR, duration);
+}
+
+lis2dh_interrupt_state lis2dh_get_int2_state() {
+ return (lis2dh_interrupt_state) watch_i2c_read8(LIS2DH_ADDRESS, LIS2DH_REG_INT2_SRC);
+}
+
lis2dh_interrupt_state lis2dh_get_int1_state();
+void lis2dh_configure_aoi_int2(lis2dh_interrupt_configuration configuration, uint8_t threshold, uint8_t duration);
+
+lis2dh_interrupt_state lis2dh_get_int2_state();
+
// Assumes SA0 is high; if low, its 0x18
#define LIS2DH_ADDRESS (0x19)
#define LIS2DH_REG_INT1_SRC 0x31
#define LIS2DH_REG_INT1_THS 0x32
#define LIS2DH_REG_INT1_DUR 0x33
+#define LIS2DH_REG_INT2_CFG 0x34
+#define LIS2DH_REG_INT2_SRC 0x35
+#define LIS2DH_REG_INT2_THS 0x36
+#define LIS2DH_REG_INT2_DUR 0x37
#define LIS2DH_REG_CLICK_CFG 0x38
#define LIS2DH_REG_CLICK_SRC 0x39
#define LIS2DH_REG_CLICK_THS 0x3A