]> git.earman.xyz Git - sensor-watch.git/commitdiff
steps toward SPI support in watch library
authorJoey Castillo <jose.castillo@gmail.com>
Mon, 25 Oct 2021 20:04:10 +0000 (16:04 -0400)
committerJoey Castillo <jose.castillo@gmail.com>
Mon, 25 Oct 2021 20:06:08 +0000 (16:06 -0400)
apps/Sensor Watch SPI Test/app.c [new file with mode: 0644]
apps/Sensor Watch SPI Test/make/.gitignore [new file with mode: 0755]
apps/Sensor Watch SPI Test/make/Makefile [new file with mode: 0755]
make.mk
watch-library/config/hpl_sercom_config.h
watch-library/hw/driver_init.h

diff --git a/apps/Sensor Watch SPI Test/app.c b/apps/Sensor Watch SPI Test/app.c
new file mode 100644 (file)
index 0000000..3fba938
--- /dev/null
@@ -0,0 +1,71 @@
+#include <stdio.h>
+#include <string.h>
+#include <peripheral_clk_config.h>
+#include "watch.h"
+
+// NOTE: as of this writing (10/25/21) there is no SPI controller functionality in the watch library.
+// this is a very basic app to confirm that SPI is working, tested with board OSO-MISC-21-001 and a GD25Q16C Flash chip.
+// The updated SPI Flash sensor board design is OSO-MISC-21-017 (it's easier to build, 0603 passives instead of 0402's).
+
+struct io_descriptor *io;
+struct spi_m_sync_descriptor SPI_0;
+
+void app_init() {
+    // SPI_0_CLOCK_init
+    hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_CORE, CONF_GCLK_SERCOM3_CORE_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
+    hri_gclk_write_PCHCTRL_reg(GCLK, SERCOM3_GCLK_ID_SLOW, CONF_GCLK_SERCOM3_SLOW_SRC | (1 << GCLK_PCHCTRL_CHEN_Pos));
+    hri_mclk_set_APBCMASK_SERCOM3_bit(MCLK);
+
+    spi_m_sync_init(&SPI_0, SERCOM3);
+
+    // SPI_0_PORT_init
+    gpio_set_pin_level(A3, true);
+    gpio_set_pin_direction(A3, GPIO_DIRECTION_OUT);
+    gpio_set_pin_function(A3, GPIO_PIN_FUNCTION_OFF);
+
+    gpio_set_pin_level(A2, false);
+    gpio_set_pin_direction(A2, GPIO_DIRECTION_OUT);
+    gpio_set_pin_function(A2, PINMUX_PB02C_SERCOM3_PAD0);
+
+    gpio_set_pin_direction(A4, GPIO_DIRECTION_IN);
+    gpio_set_pin_pull_mode(A4, GPIO_PULL_OFF);
+    gpio_set_pin_function(A4, PINMUX_PB00C_SERCOM3_PAD2);
+
+    gpio_set_pin_level(A1, false);
+    gpio_set_pin_direction(A1, GPIO_DIRECTION_OUT);
+    gpio_set_pin_function(A1, PINMUX_PB01C_SERCOM3_PAD3);
+
+    spi_m_sync_get_io_descriptor(&SPI_0, &io);
+    spi_m_sync_enable(&SPI_0);
+}
+
+void app_wake_from_backup() {
+}
+
+void app_setup() {
+}
+
+void app_prepare_for_standby() {
+}
+
+void app_wake_from_standby() {
+}
+
+static uint8_t get_id_command[4] = {0x9F};
+
+bool app_loop() {
+    watch_set_pin_level(A3, false);
+    io_write(io, get_id_command, 1);
+    uint8_t buf[3] = {0};
+
+    // should print 0, 0, 0
+    printf("blank: %x, %x, %x\n", buf[0], buf[1], buf[2]);
+    io_read(io, buf, 3);
+    watch_set_pin_level(A3, true);
+    // should print c8, 40, 15
+    printf("ident: %x, %x, %x\n", buf[0], buf[1], buf[2]);
+
+    delay_ms(100);
+
+    return false;
+}
diff --git a/apps/Sensor Watch SPI Test/make/.gitignore b/apps/Sensor Watch SPI Test/make/.gitignore
new file mode 100755 (executable)
index 0000000..3722ac6
--- /dev/null
@@ -0,0 +1 @@
+build/\r
diff --git a/apps/Sensor Watch SPI Test/make/Makefile b/apps/Sensor Watch SPI Test/make/Makefile
new file mode 100755 (executable)
index 0000000..c66ad20
--- /dev/null
@@ -0,0 +1,10 @@
+TOP = ../../..
+include $(TOP)/make.mk
+
+INCLUDES += \
+  -I../
+
+SRCS += \
+  ../app.c
+
+include $(TOP)/rules.mk
diff --git a/make.mk b/make.mk
index c9ef6534432321a5c41f9369e35c04a4f5a0a1c5..6cf0b6cae8af0bcbbcf871e8ba4353ac915d1553 100644 (file)
--- a/make.mk
+++ b/make.mk
@@ -89,6 +89,7 @@ SRCS += \
   $(TOP)/watch-library/hal/src/hal_ext_irq.c \
   $(TOP)/watch-library/hal/src/hal_gpio.c \
   $(TOP)/watch-library/hal/src/hal_i2c_m_sync.c \
+  $(TOP)/watch-library/hal/src/hal_spi_m_sync.c \
   $(TOP)/watch-library/hal/src/hal_init.c \
   $(TOP)/watch-library/hal/src/hal_io.c \
   $(TOP)/watch-library/hal/src/hal_slcd_sync.c \
index a0eb1206b8ded621270d39f22fbda96fab35ed90..6df4b08e11c5273853049936a42f8d26050e4e41 100644 (file)
 
 // Enable configuration of module
 #ifndef CONF_SERCOM_3_SPI_ENABLE
-#define CONF_SERCOM_3_SPI_ENABLE 0
+#define CONF_SERCOM_3_SPI_ENABLE 1
 #endif
 
 // Set module in SPI Master mode
 // <e> Advanced Configuration
 // <id> spi_master_advanced
 #ifndef CONF_SERCOM_3_SPI_ADVANCED
-#define CONF_SERCOM_3_SPI_ADVANCED 0
+#define CONF_SERCOM_3_SPI_ADVANCED 1
 #endif
 
 // <o> Dummy byte <0x00-0x1ff>
index 002f07aadc551e6f8677aea0b39829db428c352c..fc6cc2080a1fbaa9f21438be3d4049560811810b 100644 (file)
@@ -32,6 +32,7 @@ extern "C" {
 #include <hal_sleep.h>
 #include <hal_ext_irq.h>
 #include <hal_i2c_m_sync.h>
+#include <hal_spi_m_sync.h>
 #include <hal_delay.h>
 #include <hal_slcd_sync.h>